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All-optical logic gate based on nonlinear effects of two-dimensional photonic crystals

WU Rong YANG Jian-ye ZHANG Hao-chen

吴蓉, 杨建业, 张皓辰. 基于二维光子晶体非线性效应的全光逻辑门[J]. 中国光学(中英文), 2024, 17(2): 456-467. doi: 10.37188/CO.EN-2023-0021
引用本文: 吴蓉, 杨建业, 张皓辰. 基于二维光子晶体非线性效应的全光逻辑门[J]. 中国光学(中英文), 2024, 17(2): 456-467. doi: 10.37188/CO.EN-2023-0021
WU Rong, YANG Jian-ye, ZHANG Hao-chen. All-optical logic gate based on nonlinear effects of two-dimensional photonic crystals[J]. Chinese Optics, 2024, 17(2): 456-467. doi: 10.37188/CO.EN-2023-0021
Citation: WU Rong, YANG Jian-ye, ZHANG Hao-chen. All-optical logic gate based on nonlinear effects of two-dimensional photonic crystals[J]. Chinese Optics, 2024, 17(2): 456-467. doi: 10.37188/CO.EN-2023-0021

基于二维光子晶体非线性效应的全光逻辑门

详细信息
  • 中图分类号: TN256

All-optical logic gate based on nonlinear effects of two-dimensional photonic crystals

doi: 10.37188/CO.EN-2023-0021
Funds: Supported by Natural Science Foundation of Gansu Province (No. 21JR7RA289)
More Information
    Author Bio:

    WU Rong (1968—), female, born in Wu-wei, Gansu Province, Professor, School of Electronic and Information Engineering, Lanzhou Jiaotong University. Her research interest is on semiconductor integrated circuit. E-mail: 759165367@qq.com

    YANG Jian-ye (1999—), male, born in Zhouqu Country, Gansu Province, Postgraduate, His research interests are on mode division multiplexing integrated devices and all-optical logic devices. E-mail: 1114332211@qq.com

    Corresponding author: 1114332211@qq.com
  • 摘要:

    基于光子晶体非线性效应和线性干涉效应设计了全光异或、非和与逻辑门。应用反演定理拆分较复杂逻辑表达式,通过级联组合设计了全光或非门和四输入与门逻辑器件。本文利用时域有限差分法进行仿真模拟计算,对非线性环形腔的耦合特性进行了分析,然后在信号波长为1.47 μm条件下设计了上述逻辑器件,且通过可扩展输入端可设计出更多输入的器件。分析了信号功率对四输入与逻辑器件逻辑功能的影响。结果表明信号光源功率在1.1 W/μm2到3.4 W/μm2之间时,输出端的逻辑对比度均大于10 dB。所设计器件响应时间最短仅1.6 ps,占用面积小,易于扩展与集成,在光处理系统和集成光路中有较大应用前景。

     

  • Figure 1.  Characteristics of nonlinear ring cavity and its output at each port in the 1.42−1.52 μm band. (a) Structure and (b) normalized power of output port

    Figure 2.  Steady-state electric field diagrams and normalized powers of output ports when incident light source has different powers. (a) Electric field diagram at low power, (b) electric field diagram at high power, (c) output power at low power, and (d) output power at high power

    Figure 3.  XOR gate structure

    Figure 4.  Steady-state electric field diagrams and normalized power curves when input logic is '01', '10' and '11' respectively. (a)−(c) are electric field diagrams when input logic is (a) '01', (b) '10', and (c) '11'; (d)−(f) are normalized power curves when input logic is (d) '01', (e) '10', and (f) '11'

    Figure 5.  Two-input AND gate structure

    Figure 6.  Steady-state electric field diagrams and normalized output powers when input logic is ‘01’、 ‘11’. (a)−(b) are electric field diagrams when input logic is (a) '01' and (b) '11'; (c)−(d) are normalized output curves when input logic is (c) '01' and (d) '11'

    Figure 7.  NOR gate structure

    Figure 8.  Steady-state electric field diagrams and normalized output powers when input is ‘00’、 ‘10’、and ‘11’. (a)−(c) are electric field diagrams when input logic is (a) '00', (b) '10', and (c) '11'; (d)−(f) are normalized output powers when input logic is (d) '00', (e) '10', and (f) '11'

    Figure 9.  Four-input AND gate structure

    Figure 10.  Steady-state electric field diagrams and normalized output powers when input is ‘1000’, ‘1100’, ‘1110’ and ‘1111’. (a)−(d) are electric field diagrams when input is (a) '1000', (b) '1100' , (c) '1110', and (d) '1111' . (e)−(f) are normalized output powers when input is (e) '1000', (f) '1100', (g) '1110', and (h) '1111'

    Figure 11.  Influence of light source power on device logic function

    Table  1.   Truth table of two-input AND gate

    Input (Normalized power) Output (Normalized power)
    I1 I2 O1
    0 1 0.0168
    1 1 1.0440
    下载: 导出CSV

    Table  2.   Truth table of NOR Gate

    Input (Normalized power) Output (Normalized power)
    I1 I2 O1
    0 0 0.4830
    1 0 0.0015
    1 1 0.0011
    下载: 导出CSV

    Table  3.   Truth table of four-input AND gate

    Input (Normalized power) Output (Normalized power)
    I1 I2 I3 I4 O1
    1 0 0 0 0.002
    1 1 0 0 0.015
    1 1 1 0 0.039
    1 1 1 1 1.221
    下载: 导出CSV

    Table  4.   Summarized features of proposed structure and previous works

    Works/yearsContrast ratio(dB)
    XORANDNORFour-input AND
    Ref[28]/202050.87.74.6-
    Ref[29]/202211.66.25.9-
    Ref[30]/20238.712.87.7-
    This work15.717.925.115.0
    下载: 导出CSV
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出版历程
  • 收稿日期:  2023-08-30
  • 修回日期:  2023-10-07
  • 录用日期:  2023-10-18
  • 网络出版日期:  2023-11-29

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